Intel Debuts Xeon E7 v2 Taking Aim at RISC

by Sean Michael Kerner

More clock speed, more memory and more I/O bandwidth highlight new server chip release.

Intel formally announced its next-generation Xeon E7 v2 Ivy Bridge processor family today in an event in San Francisco packed with its partners.

The new Xeon E7 v2 is being positioned by Intel as a server platform that will help to replace legacy RISC workloads as well as being Intel Xeon E7 v2a platform for in-memory database and analytics use-cases.

During the event, Diane Bryant, senior vice president and general manager of Intel’s Data Center Group, said the Xeon E7 v2 supports two to eight socket systems with Intel Quick Path Interconnect (QPI) technology.

Intel is introducing 20 different product SKUs as part of the Xeon E7 v2 rollout with different cache sizes, core counts and frequency ratings.

"With 4.3 billion transistors on a die, utilizing our 22 nanometer trigate 3D transistor technology, it integrates up to 15 cores per socket and each of those cores is hyper-threaded, and it runs up to 3.4 GHz," Bryant said. "On top of the 3.4 GHz we also have Turbo-Boost technology."

What all that technology amounts to is a doubling of performance over the prior generation of Intel Xeon E7 processors. Additionally, the new Xeon E7 v2 now supports three times the memory capacity of its predecessor.

Intel's Xeon E7 v2 can support up to 1.5 Terabytes of memory per socket or 6 Terabytes for a four-socket server. Going a step further, memory bandwidth has been improved as well.

"As the core count, memory capacity and CPU frequency all increase it's important that the I/O scales with that," Bryant said. "So we have a 4x increase in the I/O capacity."

Additionally Bryant said that over 20 memory I/O RAS (Reliability, Availability and Serviceability) features, collectively known as Run Sure Technology, make their debut in the Xeon E7 v2.

"These are features that identify errors and either self-heal or capture and propagate the failure information to the software stack, so that the application can take action to maintain system operations," Bryant said. "The result of all that is 'five nines' of reliability, so true mission-critical reliability, delivering the uptime that is offered with RISC systems today."

Sean Michael Kerner is a senior editor at ServerWatch and InternetNews.com. Follow him on Twitter @TechJournalist.

Follow ServerWatch on Twitter and on Facebook

This article was originally published on Tuesday Feb 18th 2014
Mobile Site | Full Site